A low dropout (LDO) regulator can be used to provide regulated power to an electronic device at a level close to a level of a power source provided to the LDO regulator. FIG. 1 shows an exemplary prior art case where an LDO regulator (110) is used to provide power to a load (180) based on a power source Vbatt. The LDO regulator (110) comprises an operational amplifier (115) whose output is connected to a current driver circuit (120) capable of handling current into the load (180) based on a desired output voltage of the LDO regulator, LDO_out. Such output voltage, LDO_out, is sampled through, for example, a voltage division network formed by resistors (R1, R2) and fed back to the positive input terminal of the operational amplifier (115), to create a closed loop control of the output voltage LDO_out such as to track an input voltage fed to the inverting input terminal of the operational amplifier (OpAmp) (115). In the described closed loop mode of operation, the LDO regulator (110) regulates the output voltage LDO_out to remain substantially constant irrespective of the current required by the load (180) during operation. When in regulation, the output voltage LDO_out is based on the voltage Vramp input to the operational amplifier (115). By varying the voltage Vramp, the output voltage LDO_out varies in a substantially linear manner so long as the LDO regulator (110) is capable of operating in the closed loop mode.
With further reference to FIG. 1, the current driver circuit (120) can comprise one or more transistor devices, (101, 102), arranged as a cascode stack, including an input transistor (101) and one or more cascode transistors (102). In the LDO configuration depicted in FIG. 1, transistors (101, 102) are also referred to as pass devices or pass transistors, such as P-type MOSFETs (PMOS), which during regulation of the output voltage, LDO_out, may operate in their respective saturation regions of operation and can therefore provide a corresponding high enough gain for operation of the above described closed loop control. A person skilled in the art would know that regulation of the output voltage, LDO_out, may also be provided via operation of the cascode device (102) in its triode region so long as the input transistor (101) operates in its saturation region of operation to provide a high enough gain for closed loop operation (regulation). Biasing of the pass devices may be according to a voltage withstand capability of the pass devices in view of a high voltage across the pass devices, such high voltage being based on a voltage range of Vramp and a voltage range of the power source Vbatt.
As known to a person skilled in the art, the pass devices (101, 102) of the current driver circuit (120) can contribute to a power loss, which in some cases, such as during operation of the LDO regulator with a low voltage across the pass devices, may be a disadvantage. Such power loss in the pass devices may be reduced by driving the pass devices into their respective triode (linear) regions of operation by applying a corresponding biasing voltage to the gates of the pass devices. However, when driven into their respective triode regions of operation, the pass devices have a very low gain which can cause the LDO to operate in essentially an open loop mode where the input voltage is not tracked and therefore the LDO_out voltage is not regulated. It can be desirable to avoid, or delay, operation of the pass devices in their respective triode regions during the low voltage operation while maintaining a reduced power loss through the pass devices, and protecting the pass devices during the high voltage operation as described in the following paragraphs. This can allow maintaining regulation at higher output power given a same total size of the pass devices.